Eberhard Zehendner

Prof. Dr.
Room: 3231
Work+49 3641 946385
Advanced Computing
Institut für Informatik
Friedrich-Schiller-Universität Jena
Work
Ernst-Abbe-Platz 2
D-07743 Jena
Germany

Lectures



Aktuell: Vorlesung "Intervallarithmetik"

Aktuell: Vorlesung "Rechnerarithmetische Schaltungen"

Aktuell: Seminar "Arithmetic Circuits in Pass-Transistor Logic" [Materialien]

Aktuell: Seminar "Technische Informatik" [Materialien]

Aktuell: Seminar "Informatik und Gesellschaft (Thema: Computer Games)" [Materialien]





Vorlesung "Automatisches Parallelisieren" [Materialien]

Vorlesung "IT-Sicherheit" [Materialien]

Seminar "Low Power Computer Arithmetic" [Materialien]

Seminar "Informatik und Gesellschaft (Thema: WikiLeaks)" [Materialien]



Vorlesung "Phänomene der Rechnerarithmetik"

Vorlesung "Grundlagen der Rechnerarithmetik" [Materialien]

Seminar "Rechnerarithmetik in modernen Mikroprozessoren"

Seminar "Ausgewählte Aspekte der Rechnerarithmetik"

Seminar "Informatik und Gesellschaft (Thema: Gefahr im Internet – Gefahr aus dem Internet)" [Materialien]



Vorlesung "Automatisches Parallelisieren" [Materialien]

Seminar "New Frontiers in Computer Arithmetics" [Materialien]

Seminar "Informatik und Gesellschaft (Thema: Datenschutz und Datenpannen)" [Materialien]



Seminar "Gleitkomma-Arithmetik" [Materialien]

Seminar "Low Power Hardware Design"

Proseminar "Informatik und Gesellschaft (Thema: Alltag Überwachung)" [Materialien]



Vorlesung "Rechnerarithmetik" [Materialien]

Seminar "Gleitkomma-Addition in CMOS"

Seminar "Low Power Computer Arithmetics" [Materialien]

Proseminar "Informatik und Gesellschaft (Thema: Totale Überwachung)" [Materialien]


Archived lectures

Projects

ENEFCA

Energie-Efficient Computer Arithmetic

The main goal of ENEFCA is to investigate properties of computer arithmetic components based on redundant number representation. We focus on RTL-design und gate-level-analysis of energy-efficient carry-save and signed-digit arithmetic used for adder, multiplier, multiply-accumulate and digital filter design.

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ERA

Error Resilient Arithmetic

The main goal of ERA is to investigate error resilience detection and correction capabilities of differnet redundant number representations. We focus on RTL-design und gate-level-analysis of detection and correction methodologies used for adder, multiplier, multiply-accumulate and digital filter design.

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Publications

2012

  • David Neuhäuser, Eberhard Zehendner : Automated Generation of Carry-Save Reduction Strategies for Low Power Computer Arithmetic. in International Journal of Computers, submitted Feb. 2012. more ...
  • David Neuhäuser, Eberhard Zehendner : Comparing Multiply-Accumulate Arithmetic Units Based on Different Carry-Save Strategies. in International Journal of Circuits, Systems and Signal Processing, submitted Feb. 2012. more ...
  • David Neuhäuser, Eberhard Zehendner : Correction of Faulty Signal Transmission for Resilient Designs of Signed-Digit Arithmetic. in In Proceedings of the Workshop on Dependability and Fault-Tolerance (VERFE '12). Munich, Germany, Feb. 2012. more ...
  • David Neuhäuser, Eberhard Zehendner : Reduced Redundant Arithmetic Applied on Low Power Multiply-Accumulate Units. in In Proceedings of the 11th International Conference on Electronics, Hardware, Wireless and Optical Communications (EHAC '12). WSEAS Press, Feb. 2012. more ...

2011

  • David Neuhäuser, Eberhard Zehendner : On Carry-Save Strategies for Multiply-Accumulate Arithmetic. in In Proceedings of the 2nd European Conference of Computer Science (ECCS '11), pages 235-240. WSEAS Press, Dec. 2011. more ...
  • David Neuhäuser, Eberhard Zehendner : VHDL Code Generator for Optimized Carry-Save Reduction Strategy in Low Power Computer Arithmetic. in In Proceedings of the 2nd European Conference of Circuits Technology and Devices (ECCTD '11), pages 229-234. WSEAS Press, Dec. 2011. more ...

more publications