Exploring the design space of signed-binary adder cells.



Arithmetic based on signedbinary number representation is an alternative to carrysave arithmetic. Both offer adders with wordlength independent latencies. Comparing both approaches requires optimized adder cells. Small and fast full adder designs have been introduced. A thorough investigation of signedbinary adder cells is still missing. We show that for an example signedbinary encoding scheme the design space consists of 2^38 different truth tables. Each represents a bitlevel signedbinary adder cell. We proposed a new method to enumerate and analyze such a huge design space to gain small area, low power, or low latency signedbinary adder cells and show the limitations of our approach.