SMART

SMART - Secure, Mobile visual sensor networks ArchiTecture<br/> SMART targets to design and implement a highly reconfigurable Wireless Visual Sensor Node (WVSN) defined as a miniaturized, light-weight, secure, low-cost, battery powered sensing device, enriched with video and data compression capabilities.

Status: ongoing

Members:

Description

SMART’s most innovative components are:

  • Develop and implement encryption/authentication, data and video compression systems addressing WSN’s requirements
  • Develop and implement a novel reconfigurable processing device (called RASIP) that makes use of reconfiguration technology and have a low-power CPU on the same chip
  • Develop and implement an innovative middleware framework allowing the end-user to seamlessly take advantage of the novel features of the SMART infrastructure.
  • Implement highly-secure nodes providing high resistance to side-channel attacks
  • Develop and implement mechanisms and architectures for real-time partial reconfiguration that will be optimised for low-power consumption
  • Propose and implement a mechanism that will allow for the self reconfiguration of the nodes based on the conditions of the environment

The smart project shall implement a new processor architecture capable for various operation modes (e.g. low-power and low-secure one, high-power and high-quality video one etc)

Moreover, SMART will be implemented in two different, yet fully compatible, approaches: One will be based on standard off-the-shelf reconfigurable components (FPGAs), and another one on a reconfigurable processing unit (RASIP) implemented in silicon. Our contribution is the development of the RASIP design. This unit is a combination of an application specific instruction set processor (ASIP) and an FPGA whereas the scope of reconfiguration is unlike an FPGA more coarse grain.

Project web site: www.artemis-smart.eu

Project Associates